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Product description

Product model

Design & development

  • BAT32A279

    AEC-Q100 Grade 1, Cortex M0+, 512KB Flash, 3xCAN、LIN、 64~100 Pin multiple packages

    Datasheet >

    BAT32A279 series uses the high-performance ARM Cortex-M0®+ 32bit RISC core, which can operate at 64MHz ,512KB Flash Memory ,64KB SRAM,20KB Data Flash Memory.Various communication interfaces  are integtated such as I2C, SPI, UART, LIN, CAN bus, as well as  analog front-end with operational amplifiers, ADC, 12bit A/ D converter,temperature sensor, 8bit D/ A converter,comparator. With the integrated event linkage controller, direct connection between hardware modules can be realized without CPU intervention, which is faster than using interrupts.    

    The BAT32A279 microcontroller family's excellent reliability, rich integrated peripheral functions, and excellent low-power performance make it suitable for a wide range of automotive product development,such as Safety Seat,Ripple anti-pinch, BCM,etc application.

    Features

    > ARM Cortex M0+ core 

    > Up to 64MHz @2.0V-5.5V 

    > Operating voltage: 2.0V-5.5V 

    > Operating temperature: -40℃-125℃ 

    > 512KB Flash > 64KB SRAM 

    > 20KB data flash 

    > 17 16-bit timers 

    > real-time RTC supported 

    > 17-channel PWM module(with motor-dedicated PWM function) 

    > build-in 12-bit ADC with sample rate as 1.42Msps 

    > 8-bit DAC function supported 

    > enhanced DMA 

    > 3-channel CAN 

    > 4 serial ports which can be configured either as 1-channel UART/2-channel SPI/2-channel simplified i2c respectively 

    >  UART of unit 0 supports LIN Bus communication 

    >  2 dedicated standard i2c ports 

    >  2-channel SPI ports(8-bit & 16-bit both supported) 

    >  LCD BUS port supported:8080 & 6800 both supported 

    >  2-channel analogue comparator with dual-edging-lag function 

    >  2-channel PGA 

    >  linkage control supported 

    >  clock source: internal high-speed, internal low-speed, external high-speed, external low-speed & internal PLL 

    > abnormal storage space access error, hardware CRC calibration Inspection, special SFR protection to prevent misoperation 

    > 128-bit unique ID number 

    >  Conforms to AEC-Q100 Grade 1 standard 

    > Package: LQFP64/LQFP80/LQFP100

  • Product model

    Part Number Package Frequency (MHz) Core Temp Voltage Memory Type ROM RAM Data Flash GPIO DMA Timer LSE WDT/WWDT RTC UART I²C SPI CAN LIN PWM/EPWM SAR-ADC SAR-ADC-bit SAR-ADC-ch SAR-ADC-speed(Msps) DAC DAC-bit COMP PGA LCD Co_proc CO-DIV
    SAR-ADC-unitSAR-ADC-bitSAR-ADC-chSAR-ADC-speed(Msps)DAC-unitDAC-bitCO-MULCO-DIV
    BAT32A279KM64FB LQFP64 64 M0+ -40 ~125 2.0V~5.5V FLASH 512KB 64KB 20KB 75 37 17 Y 1 1 4 8+2 8+1 2 1 16 1 12 22 1.42M 2 8 2 2

    /

    Y Y
    BAT32A279KM80FA LQFP80 64 M0+ -40 ~125 2.0V~5.5V FLASH 512KB 64KB 20KB 75 38 17 Y 1 1 4 8+2 8+1 2 1 16 1 12 22 1.42M 2 8 2 2

    /

    / /
    BAT32A279KM100FA LQFP100 64 M0+ -40 ~125 2.0V~5.5V FLASH 512KB 64KB 20KB 93 39 17 Y 1 1 4 8+2 8+2 3 1 16 1 12 28 1.42M 2 8 2 2

    Y

    Y Y

  • Design & development

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