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[CMSemicon's view] Building a "Security Core" Ecosystem to Boost the Future Development of Domestic Chips
2021-06-10
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RISC-V is a CPU open instruction set architecture based on a streamlined instruction set, which enables the whole industry to gain a path to design products in a more cost-efficient and flexible way. More and more chip companies as well as system companies are joining its application process, and the construction and development of domestic security path based on RISC-V architecture is accelerating.

 

On June 9, in order to promote the independent innovation of domestic chip industry and accelerate the RISC-V ecological construction in Chengdu IC Area, Chengdu National Core Fire Dual Innovation Base and National IC Design Chengdu Industrialization Base invited Nuclei System Technology, CMSemicon and many leading enterprises in field of RISC-V to discuss the topic "Domestic Independent Security Core ". Mr. Miao Xiaoyu, Deputy General Manager and Technical Director of CMSemicon, was invited to attend the conference and gave a keynote speech on the quality, safety and reliable supply of chips.

 

With the rapid rise of RISC-V system around the world, a variety of application scenarios such as IoT, consumer electronics, industrial control and intelligent terminals have put forward new requirements for the security challenges of chips. Mr. Miao believes that chip security is determined by two aspects, i.e. safety and reliability of chip quality and chip supply. Only when the two aspects form a synergy can the chip keep a long-lasting vitality so that it can create values for customers continuously.

 

CMSemicon actively contributes to the security and intelligence of RISC-V architecture, according to the principles of localization, independence and security, improves the value of its products from comprehensible aspects. Through the RISC-V architecture technology platform, the company improves R&D efficiency, shortens development cycles and reduces application risks for its customers:

 

> Quality Safety: establish automotive-grade quality system certification, conduct AEC-Q100 testing for key products, and with a plan to complete IATF 16949 quality system certification and ISO26262 quality system certification.

> Supply Safety: Effectively ensure normal supply and stable delivery of chips through long-term and stable strategic cooperation with upstream suppliers.

> Understanding System: Improve innovation capability and degree of integration. Through deeply understanding customer’s product development needs, design cost-effective, highly integrated SoC chips. Maintain effective cooperation with downstream customers through the six core competencies: MCU, Analog, RF, power, Algorithm, Quality and Assurance.

> Expand Architecture: help promote the ecological establishment of open instruction set architecture. On the one hand, ensure system security. On the other hand, promote a diverse system ecology conducive to healthy competition. Through the RISC-V architecture shared technology platform, create value for customers.

 

CMSemicon insists on domestic independent research and development, and builds 32-bit microcontroller with RISC-V core- ANT32RV56xx, which integrates analog peripherals and simplifies design, and is widely applicable in wireless charging, digital-analog hybrid and IoT applications by virtue of its efficient performance and flexible compatibility.

 

In the future, driven by innovation, CMSemicon will continue to increase investment in products with higher performance application. It is as well committed to build RISC-V open ecological construction and lead China's domestic RISC-V ecology to achieve leapfrog development.


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Email:Pr@mcu.com.cn
Contacts:Ms.Han

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